1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to a non-volatile semiconductor memory device with a high-dielectric gate insulating film.
2. Description of the Related Art
Metal-oxide-semiconductor field-effect transistors (MOSFETs) are widely used in integrated circuits, particularly including memory devices for storing digital data, such as electrically erasable programmable read-only memory (EEPROM) and flash memory. Cellular phones, for example, employ this kind of semiconductor memory chips as their firmware code storage, and personal computers have one on their motherboard to store the basic input/output system (BIOS) program. For EEPROM, there are several different architectures each having distinct characteristics and features. Among them are floating-gate metal-nitride-oxide semiconductor (MNOS) structure and metal-oxide-nitride-oxide semiconductor (MONOS) structure.
FIG. 12 shows a simplified cross-sectional view of a MONOS cell, as an example of an existing non-volatile memory device. This MONOS-type semiconductor memory cell 50 is formed on top of a p-type silicon (Si) substrate 51 having a source region 51s and a drain region 51d which are created as heavily n-doped wells. Covering the channel region between the source and drain, an oxide-nitride-oxide (ONO) stack 52 is grown on the substrate surface, which consists of a silicon oxide (SiO2) film 52a, a silicon nitride (SiN) film 52b, and another SiO2 film 52c. Deposited on top of that is a control gate 53. In short, the MONOS cell is an n-channel MOSFET whose gate insulation layer is replaced with the ONO stack 52.
The illustrated MONOS cell 50 serves as a one-bit memory which can be programmed by injecting electrons from the silicon substrate 51 into traps that exist in the vicinity of the interface between the SiO2 film 52a and SiN film 52b or inside the SiN film 52b itself. The trapped charge causes a change in the threshold level of that MOSFET, meaning that we can control its on/off state by charging or not charging the cell 50.
In relation to the above, a non-volatile semiconductor memory device called NROM is of particular interest recently. NROM, which stands for xe2x80x9cnitrided read-only memory,xe2x80x9d was developed by Saifun Semiconductors Ltd. in Israel. While based on the MONOS concept described above, NROM realizes a multibit cell structure by using charge-retaining traps at two separate sites (one is near the source, and the other is near the drain), thereby storing two bits per cell. This NROM technology is expected to provide a way to larger capacity, high density non-volatile memory devices.
The above-described MONOS memories, however, has the following problem in its ONO structure. That is, the SiN film used in this structure is known to have (as its inherent nature) not a small amount of fixed charges and traps in itself. Injection of electrons into a charge-retaining region of a MONOS cell requires a relatively high voltage of a few volts or around ten volts, so as to make Fowler-Nordheim (FN) tunneling or direct tunneling happen. In this tunneling process, some exited electrons behave as hot carriers which would produce new traps in an ONO film, or would sweep away some trapped charges toward the gate electrode.
The aforementioned NROM devices use near-source region and near-drain regions of a silicon nitride film to trap electrons. It is, however, difficult to obtain well-controlled traps having an intended depth, capture cross-section, capture rate, and emission rate. Also, electrons trapped in one region would raise the potential energy, and some of them could escape and move to the other trapping region, resulting in a memory data error.
In view of the foregoing, it is an object of the present invention to provide a semiconductor memory device which more reliably retains electrons trapped in its charge-trapping regions.
Another object of the present invention is to provide a method of manufacturing a semiconductor memory device which more reliably retains electrons trapped in its charge-trapping regions.
To accomplish the first object stated above, according to the present invention, there is provided a non-volatile semiconductor memory device. This device comprises the following elements: a semiconductor substrate; a high-dielectric gate insulating film grown on the semiconductor substrate, which comprises a first oxide and a second oxide, the second oxide having a smaller bandgap than that of the first oxide and being scattered in dot-like form in the first oxide; and a control gate electrode deposited on the high-dielectric gate insulating film.
Further, to accomplish the second object stated above, the present invention provides a method of manufacturing a non-volatile semiconductor memory device which uses a high-dielectric material for gate insulation. This method comprises the following steps: forming a gate insulating film by depositing a mixture of a first oxide and a second oxide having a smaller bandgap than that of the first oxide; and applying a heat treatment to the gate insulating film to create a phase separated state of the first and second oxides deposited.
The above and other objects, features and advantages of the present invention will become apparent from the following description when taken in conjunction with the accompanying drawings which illustrate preferred embodiments of the present invention by way of example.